Communication between components of a computer system across the printed circuit board (PCB) of a main board utilizes either parallel communication buses or serial communication buses. Conventional high speed parallel communication buses require very tight controls on the amount of skew or distortion on the communication lines. These tight requirements result in a difficult process for determining a proper layout of the communication lines on a PCB. The communication lines in a parallel bus must be balanced, have matching impedances and similar physical characteristics. These conventional high speed parallel buses do not support communication between devices with differing communication rates, capacities or speeds. Conventional high speed parallel buses make overall PCB layout and design more difficult and time consuming for main board manufacturers.
Conventional high speed serial communication buses avoid some of the problems of high speed parallel buses but require more complex digital signal processing by the components communicating over the high speed serial bus. High speed serial buses require the communicating components to determine clock recovery, undergo pre-emphasis of the serial line, perform synchronization and similar digital signal processing calculations. Components in a computer system that utilize high speed serial buses must devote significant resources and integrated circuit space to perform the requisite digital signal processing functions. High speed serial buses are also unable to support communication between devices having different communication capabilities. Neither high speed parallel nor serial buses support communication between components manufactured according to the most current communication and data rate standards and legacy components. This requires manufacturers to abandon the use of legacy components when a new communication standard is adopted in an industry.